The use of rule-based and field solver engines is essential to deliver the parasitic extraction accuracy necessary for detailed 3D structures such as finFETS, as well as the performance needed for fast throughput of full-chip designs featuring many millions of nets on multiple diverse routing layers.

In this six-page whitepaper, you will learn: 

• How increased complexity in integrated circuit (IC) design affects design engineers
• How hybrid parasitic extraction can be used to address these issues
• How scalable multi-processing can be used to tackle burgeoning design size